Traditionally, integrated circuit (IC) chips are connected to external circuits by metal wires (wire bonding). However, with the reducing of the feature size of the IC chips and the increasing on the scale of the integrated circuits, such wire bonding technique is no longer applicable.
The wafer level chip scale packaging (WLCSP) is a technology to package the whole wafer and then, after testing, to dice the wafer into individual finished chips. Thus, the packaged chip size and the die are completely consistent. The wafer level chip scale packaging technology is now replacing the traditional packaging technologies such as ceramic leadless chip carrier, organic leadless chip carrier, etc., meeting the market's demands for microelectronic products that are increasingly light, small, short, thin, and inexpensive. Using the wafer level chip scale packaging technology, the chip size can be miniaturized at a high degree, and the cost of the chips decreases significantly with the decreasing chip size and the increasing of wafer size. Thus, the wafer level chip scale packaging technology integrates IC design, wafer manufacturing, packaging and testing, and is a hot spot in the current packaging industry and also a trend for future development.
FIG. 1 shows a cross-section view of a packaging structure using current wafer level chip scale packaging technology. As shown in FIG. 1, the packaging structure includes: a semiconductor substrate 101; a metal pad 103 located inside and outside of the semiconductor substrate 101; and an insulating layer 102 formed on the surface of the semiconductor substrate 101. The insulating layer 102 has an opening exposing the metal pads 103. Within the opening, there a metal electrode 104 covering a portion of the metal pad 103; and a solder ball 105 is located on top of the metal electrode 104 and cover the upper surface of the metal electrode 104.
However, the contact area between the solder ball 105 and the metal electrode 104 is relatively small, and the adhesion between the solder ball 105 and the metal electrode 104 is relatively poor. At the same time, the side of the metal electrode 104 is completely bare, and can be easily oxidized and loses reliable connection to the insulating layer 102. In addition, the solder ball 105 is located directly above the under-the-ball metal electrode 104. Because the under-the-ball metal electrode 104 is typically made of copper and the solder ball 105 is usually made of tin, tin atoms can diffuse into the copper electrode and copper atoms can also diffuse into the solder balls. Thus, intermetallic compound (IMC) and voids may be formed between the solder ball 105 and the metal electrode 104 (solder joint), whose brittleness can also affect the mechanical strength and longevity of the solder joint.
Thus, the current WLCSP chip packaging structure may have a poor reliability. The disclosed methods and systems are directed to solve one or more problems set forth above and other problems.